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NXP Semiconductors /MIMXRT1052 /LCDIF /THRES

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Interpret as THRES

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PANIC0FASTCLOCK

Description

LCDIF Threshold Register

Fields

PANIC

This value should be set to a value of pixels from 0 to 511
FASTCLOCK

This value should be set to a value of pixels, from 0 to 511

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data